We want to test the dcmac connections with the latest version of SLASH we are using (based on dev).
I was able to build the example with some minor changes in the CMakeLists.txt:
papeg@43f100f
We have connected port 0 and port 2 with a QSFPDD cable (which should match the configuration in the example).
Using dmac_init.py is reported to be up:
python ../../../linker/resources/dcmac/driver/dcmac_init.py -d 61 -k
Keep ALIVE path
DCMAC 0 link still up after 20.1 s
network_end2end_test.py runs through, but shows 0 values for all counters.
Using the cpp host code (06_dmac.cpp), the FPGA crashes after starting the kernels with invalid PCI data read:
[Wed May 6 09:06:44 2026] ami 0000:61:00.0: ERROR : Logging thread error - invalid PCI data read!
[Wed May 6 09:06:44 2026] eqdma_cpm5_hw_error_process: Global Err Reg(0x248) = 0xffffffff
[Wed May 6 09:06:44 2026] ami: CRITICAL WARNING: cmd id: 74 timed out(timeout), hot reset is required
We want to test the dcmac connections with the latest version of SLASH we are using (based on dev).
I was able to build the example with some minor changes in the CMakeLists.txt:
papeg@43f100f
We have connected port 0 and port 2 with a QSFPDD cable (which should match the configuration in the example).
Using dmac_init.py is reported to be up:
network_end2end_test.py runs through, but shows 0 values for all counters.
Using the cpp host code (06_dmac.cpp), the FPGA crashes after starting the kernels with invalid PCI data read: