v2.0.3

• Fix regression in set_freq() that wiped out proper R div setting, causing errors in setting low frequency outputs

v2.0.2

• Increase maximum frequency in set_freq() to 225 MHz
• Change SI5351_MULTISYNTH_SHARE_MAX from 112.5 MHz to 100 MHz due to stability issues
• Add explicit reset of VCXO param in reset()
• Add I2C bus address parameter and default to class constructor
• Update si5351_calibration example sketch

v2.0.1

Fix logic error in set_freq() which causes errors in setting multiple clocks >100 MHz

v2.0.0

• Complete rewrite of tuning algorithm
• Add support for setting CLK6 and CLK7
• Add support for VCXO (on Si5351B)
• Change interface of init() and set_freq()
• Add set_freq_manual() method
• Add reset() method
• Added many new example sketechs

v1.1.2

Fix error where register 183 is not pre-loaded with correct value per AN619. Add define for SI5351_CRYSTAL_LOAD_0PF (undocumented in AN619 but present in the official ClockBuilder software).

Closes #21

v1.1.1

Fix if statement eval error in set_clock_disable()

v1.1.0

Added set_pll_input() method to allow toggling the PLL reference source for the Si5351C variant and added support to init() for different PLL reference frequencies from 10 to 100 MHz.