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| 1 | +# Copyright 2025 Arm Limited and/or its affiliates. |
| 2 | +# |
| 3 | +# This source code is licensed under the BSD-style license found in the |
| 4 | +# LICENSE file in the root directory of this source tree. |
| 5 | + |
| 6 | +import torch |
| 7 | +from executorch.backends.arm.test.common import parametrize |
| 8 | +from executorch.backends.cortex_m.test.tester import ( |
| 9 | + CortexMTester, |
| 10 | + McuTestCase, |
| 11 | + ramp_tensor, |
| 12 | +) |
| 13 | + |
| 14 | + |
| 15 | +class CortexMAvgPool2d(torch.nn.Module): |
| 16 | + ops_before_transforms = { |
| 17 | + "executorch_exir_dialects_edge__ops_aten_avg_pool2d_default": 1, |
| 18 | + "executorch_exir_dialects_edge__ops_quantized_decomposed_quantize_per_tensor_default": 2, |
| 19 | + "executorch_exir_dialects_edge__ops_quantized_decomposed_dequantize_per_tensor_default": 2, |
| 20 | + } |
| 21 | + |
| 22 | + ops_after_transforms = { |
| 23 | + "executorch_exir_dialects_edge__ops_cortex_m_quantized_avg_pool2d_default": 1, |
| 24 | + "executorch_exir_dialects_edge__ops_cortex_m_quantize_per_tensor_default": 1, |
| 25 | + "executorch_exir_dialects_edge__ops_cortex_m_dequantize_per_tensor_default": 1, |
| 26 | + } |
| 27 | + |
| 28 | + def __init__( |
| 29 | + self, kernel_size, stride, padding=0, ceil_mode=False, count_include_pad=False |
| 30 | + ): |
| 31 | + super().__init__() |
| 32 | + self.pool = torch.nn.AvgPool2d( |
| 33 | + kernel_size, |
| 34 | + stride, |
| 35 | + padding, |
| 36 | + ceil_mode=ceil_mode, |
| 37 | + count_include_pad=count_include_pad, |
| 38 | + ) |
| 39 | + |
| 40 | + def forward(self, x): # noqa: D102 |
| 41 | + return self.pool(x) |
| 42 | + |
| 43 | + |
| 44 | +# Prepare test cases: simple 2x2 pool on 4x4, and 3x3 stride 1 on 3x3 |
| 45 | +test_cases = { |
| 46 | + "avgpool_2x2": McuTestCase( |
| 47 | + CortexMAvgPool2d(kernel_size=2, stride=2), (ramp_tensor(0, 15, (1, 1, 4, 4)),) |
| 48 | + ), |
| 49 | + "avgpool_3x3_s1": McuTestCase( |
| 50 | + CortexMAvgPool2d(kernel_size=3, stride=1, padding=1), |
| 51 | + (ramp_tensor(0, 8, (1, 1, 3, 3)),), |
| 52 | + ), |
| 53 | + # additional pooling configurations: padding, stride, ceil_mode, count_include_pad |
| 54 | + "avgpool_2x2_pad1": McuTestCase( |
| 55 | + CortexMAvgPool2d(kernel_size=2, stride=2, padding=1), |
| 56 | + (ramp_tensor(0, 24, (1, 1, 5, 5)),), |
| 57 | + ), |
| 58 | + "avgpool_3x3_s2_pad1": McuTestCase( |
| 59 | + CortexMAvgPool2d(kernel_size=3, stride=2, padding=1), |
| 60 | + (ramp_tensor(0, 15, (1, 1, 4, 4)),), |
| 61 | + ), |
| 62 | +} |
| 63 | + |
| 64 | +test_cases_fp = { |
| 65 | + "avgpool_3x3_s2_pad1_ceil": McuTestCase( |
| 66 | + CortexMAvgPool2d(kernel_size=3, stride=2, padding=1, ceil_mode=True), |
| 67 | + (ramp_tensor(0, 15, (1, 1, 4, 4)),), |
| 68 | + ), |
| 69 | + "avgpool_3x3_s2_pad1_countinc": McuTestCase( |
| 70 | + CortexMAvgPool2d(kernel_size=3, stride=2, padding=1, count_include_pad=True), |
| 71 | + (ramp_tensor(0, 15, (1, 1, 4, 4)),), |
| 72 | + ), |
| 73 | +} |
| 74 | + |
| 75 | + |
| 76 | +@parametrize("test_case", test_cases) |
| 77 | +def test_dialect_avg_pool2d(test_case): |
| 78 | + tester = CortexMTester(test_case.model, test_case.example_inputs) |
| 79 | + tester.test_dialect( |
| 80 | + test_case.model.ops_before_transforms, |
| 81 | + test_case.model.ops_after_transforms, |
| 82 | + qtol=1, |
| 83 | + ) |
| 84 | + |
| 85 | + |
| 86 | +@parametrize("test_case", test_cases_fp) |
| 87 | +def test_dialect_avg_pool2d_fp(test_case): |
| 88 | + tester = CortexMTester(test_case.model, test_case.example_inputs) |
| 89 | + tester.test_dialect( |
| 90 | + {"executorch_exir_dialects_edge__ops_aten_avg_pool2d_default": 1}, |
| 91 | + {"executorch_exir_dialects_edge__ops_aten_avg_pool2d_default": 1}, |
| 92 | + qtol=1, |
| 93 | + ) |
| 94 | + |
| 95 | + |
| 96 | +@parametrize("test_case", test_cases) |
| 97 | +def test_implementation_avg_pool2d(test_case): |
| 98 | + tester = CortexMTester(test_case.model, test_case.example_inputs) |
| 99 | + tester.test_implementation(qtol=1) |
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