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ZJIT: Reduce number of one-Insn pushes in LIR linearize
1 parent 716c536 commit d1f179d

1 file changed

Lines changed: 30 additions & 21 deletions

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zjit/src/backend/lir.rs

Lines changed: 30 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -134,6 +134,11 @@ impl BasicBlock {
134134
self.insn_ids.push(None);
135135
}
136136

137+
pub fn push_insns(&mut self, insns: Vec<Insn>) {
138+
self.insn_ids.extend(std::iter::repeat(None).take(insns.len()));
139+
self.insns.extend(insns);
140+
}
141+
137142
pub fn edges(&self) -> EdgePair {
138143
// Stub blocks (from new_block_without_id) have no real CFG structure.
139144
if self.rpo_index == DUMMY_RPO_INDEX {
@@ -1832,7 +1837,11 @@ impl Assembler
18321837

18331838
// Process each instruction, expanding branch params if needed
18341839
for insn in &block.insns {
1835-
self.expand_branch_insn(insn, &mut insns);
1840+
match insn {
1841+
// Skip identity moves
1842+
Insn::Mov { dest, src } if src == dest => {},
1843+
insn => self.expand_branch_insn(insn, &mut insns),
1844+
}
18361845
}
18371846

18381847
// Eliminate redundant jumps: if the last instruction is an
@@ -1931,9 +1940,7 @@ impl Assembler
19311940
self.new_vreg(num_bits)
19321941
}
19331942

1934-
/// Append an instruction onto the current list of instructions and update
1935-
/// the live ranges of any instructions whose outputs are being used as
1936-
/// operands to this instruction.
1943+
/// Append an instruction onto the current list of instructions
19371944
pub fn push_insn(&mut self, insn: Insn) {
19381945
// If this Assembler should not accept scratch registers, assert no use of them.
19391946
if !self.accept_scratch_reg {
@@ -1948,6 +1955,23 @@ impl Assembler
19481955
self.current_block().push_insn(insn);
19491956
}
19501957

1958+
/// Append multiple instructions to the current list of instructions
1959+
pub fn push_insns(&mut self, insns: Vec<Insn>) {
1960+
// If this Assembler should not accept scratch registers, assert no use of them.
1961+
if !self.accept_scratch_reg {
1962+
for insn in &insns {
1963+
let opnd_iter = insn.opnd_iter();
1964+
for opnd in opnd_iter {
1965+
assert!(!Self::has_scratch_reg(*opnd), "should not use scratch register: {opnd:?}");
1966+
}
1967+
}
1968+
}
1969+
1970+
self.idx += insns.len();
1971+
1972+
self.current_block().push_insns(insns);
1973+
}
1974+
19511975
/// Create a new label instance that we can jump to
19521976
pub fn new_label(&mut self, name: &str) -> Target
19531977
{
@@ -3803,24 +3827,9 @@ impl Assembler {
38033827
// Create one giant block to linearize everything into
38043828
asm_local.new_block_without_id("linearized");
38053829

3806-
// Get linearized instructions with branch parameters expanded into ParallelMov
3830+
// Get linearized instructions
38073831
let linearized_insns = self.linearize_instructions();
3808-
3809-
// TODO: Aaron, this could be better. We don't need to do this, FIXME
3810-
// Process each linearized instruction
3811-
for insn in linearized_insns {
3812-
match insn {
3813-
Insn::Mov { dest, src } => {
3814-
if src != dest {
3815-
asm_local.push_insn(insn);
3816-
}
3817-
},
3818-
_ => {
3819-
asm_local.push_insn(insn);
3820-
}
3821-
}
3822-
}
3823-
3832+
asm_local.push_insns(linearized_insns);
38243833
asm_local
38253834
}
38263835
}

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