[None][feat] Fully non-blocking pipeline parallelism executor loop.#10349
[None][feat] Fully non-blocking pipeline parallelism executor loop.#10349yuxianq merged 1 commit intoNVIDIA:mainfrom
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📝 WalkthroughWalkthroughThe pull request introduces diff tracking in PyResult for incremental output changes, refactors micro-batch scheduling with per-microbatch communication handles in the PP pipeline, adds thread-local MPI communicator support, wraps MPI sub-communicators for serialization, and adds profiling instrumentation and utility formatting functions. Changes
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Actionable comments posted: 2
🤖 Fix all issues with AI agents
In `@tensorrt_llm/_utils.py`:
- Around line 507-518: Remove the unused local_mpi_comm function and the
local_comm variable to avoid caching a module-level MPI communicator that
bypasses thread-local overrides; specifically delete the local_comm assignment
and the def local_mpi_comm(...) helper and any references to them, leaving
mpi_comm(), set_thread_local_mpi_comm(), and thread_local_comm intact so all
dynamic calls continue to honor thread-local overrides.
🧹 Nitpick comments (4)
tensorrt_llm/llmapi/disagg_utils.py (1)
282-283: Update the return type annotation to reflect the actual return type.The function signature declares the return type as
Tuple[bool, int, Comm], but the function actually returnsTuple[bool, int, pkl5.Intracomm](line 323). The return type annotation should be updated to match the implementation and align with how the globalcommis consistently initialized withpkl5.Intracommelsewhere in the codebase.Suggested fix
-def split_world_comm( - server_configs: List[CtxGenServerConfig]) -> Tuple[bool, int, Comm]: +def split_world_comm( + server_configs: List[CtxGenServerConfig]) -> Tuple[bool, int, pkl5.Intracomm]:tensorrt_llm/_torch/utils.py (1)
410-431: Guard empty tensors (and make CPU sampling explicit) to avoid crashes/surprising sync.max()/min()will throw onnumel==0, and.tolist()on CUDA will sync anyway—better to make the copy explicit and bounded.Proposed patch
def tensor_to_str(x: torch.Tensor, num_elements: int = 10) -> str: # Pass num_elements=-1 will print the whole tensor - if num_elements < 0: - num_elements = torch.numel(x) - if x.dtype in (torch.int32, torch.int64): - float_x = x.to(dtype=float) + numel = x.numel() + if num_elements < 0: + num_elements = numel + if x.dtype in (torch.int32, torch.int64): + float_x = x.to(dtype=torch.float32) else: float_x = x + if numel == 0: + return ("Tensor(" + f"shape={tuple(x.shape)}, " + f"dtype={torch_dtype_to_str(x.dtype)}, " + f"device={x.device}, " + "stats=(empty), " + "values=[]" + ")") return ("Tensor(" f"shape={tuple(x.shape)}, " f"dtype={torch_dtype_to_str(x.dtype)}, " f"device={x.device}, " f"stats=(" f"abs_mean={float_x.abs().mean().item():.3f}, " f"mean={float_x.mean().item():.3f}, " f"std={float_x.std().item():.3f}, " - f"max={x.max().item():.3f}, " - f"min={x.min().item():.3f}" + f"max={float_x.max().item():.3f}, " + f"min={float_x.min().item():.3f}" "), " - f"values={x.flatten()[:num_elements].tolist()}" + f"values={x.flatten()[:num_elements].detach().cpu().tolist()}" ")")tensorrt_llm/_torch/pyexecutor/llm_request.py (2)
230-248: Diff structure is reasonable; consider clarifying CPU/device expectations for tensor fields. Right nowDiffcan transiently hold CUDA tensors untilget_diff()runs; if any caller forgets to callget_diff()before transport, you’ll get non-serializable payloads.
299-333: Makeget_diff()/apply_diff()more defensive (optional), to avoid future flag mismatches. Today it relies on “all ranks constructed PyResult with identical return_* flags”; a small divergence will become an AttributeError.Sketch
def get_diff(self) -> Diff: - for i, context_logits in enumerate(self.diff.context_logits_list): - self.diff.context_logits_list[i] = context_logits.to("cpu") + for i, context_logits in enumerate(self.diff.context_logits_list): + if isinstance(context_logits, torch.Tensor) and context_logits.is_cuda: + self.diff.context_logits_list[i] = context_logits.to("cpu", non_blocking=True) for i, generation_logits in enumerate(self.diff.generation_logits_list): - self.diff.generation_logits_list[i] = generation_logits.to("cpu") + if isinstance(generation_logits, torch.Tensor) and generation_logits.is_cuda: + self.diff.generation_logits_list[i] = generation_logits.to("cpu", non_blocking=True) return self.diff def apply_diff(self, diff: Diff): if diff.exclude_last_generation_logits is not None: self._exclude_last_generation_logits = diff.exclude_last_generation_logits if len(diff.context_logits_list) > 0: - for context_logits in diff.context_logits_list: - self._context_logits.append(context_logits) + if self._context_logits is not None: + for context_logits in diff.context_logits_list: + self._context_logits.append(context_logits) if len(diff.generation_logits_list) > 0: - for generation_logits in diff.generation_logits_list: - self._generation_logits.append(generation_logits) + if self._generation_logits is not None: + for generation_logits in diff.generation_logits_list: + self._generation_logits.append(generation_logits) if diff.reset_log_probs is not None: - self._log_probs.set_log_probs(*diff.reset_log_probs) + if self._log_probs is not None: + self._log_probs.set_log_probs(*diff.reset_log_probs) if len(diff.log_probs_list) > 0: - for log_probs, cum_log_probs in diff.log_probs_list: - self._log_probs.append(log_probs, cum_log_probs) + if self._log_probs is not None: + for log_probs, cum_log_probs in diff.log_probs_list: + self._log_probs.append(log_probs, cum_log_probs)
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📒 Files selected for processing (6)
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/_torch/pyexecutor/llm_request.pytensorrt_llm/_torch/pyexecutor/py_executor.pytensorrt_llm/_torch/utils.pytensorrt_llm/_utils.pytensorrt_llm/llmapi/disagg_utils.py
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**/*.py
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
**/*.py: The code developed for TensorRT-LLM should conform to Python 3.8+
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Files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/_torch/utils.pytensorrt_llm/llmapi/disagg_utils.pytensorrt_llm/_torch/pyexecutor/llm_request.pytensorrt_llm/_utils.pytensorrt_llm/_torch/pyexecutor/py_executor.py
**/*.{cpp,cc,cxx,h,hpp,hxx,cu,cuh,py}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
All TensorRT-LLM source files (.cpp, .h, .cu, .py, and other source files) should contain an NVIDIA copyright header with the year of latest meaningful modification
Files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/_torch/utils.pytensorrt_llm/llmapi/disagg_utils.pytensorrt_llm/_torch/pyexecutor/llm_request.pytensorrt_llm/_utils.pytensorrt_llm/_torch/pyexecutor/py_executor.py
🧠 Learnings (6)
📚 Learning: 2025-12-12T03:27:18.859Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 9655
File: tensorrt_llm/_torch/pyexecutor/sampler.py:3031-3031
Timestamp: 2025-12-12T03:27:18.859Z
Learning: In tensorrt_llm/_torch/pyexecutor/sampler.py, when reviewing code that iterates through requests, ensure it does not convert excessive data into Python lists. Instead, the code should use torch.gather or indexing to gather only the data that will be used in the for loop before converting to Python lists. This minimizes data movement and improves performance.
Applied to files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/_torch/pyexecutor/py_executor.py
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.py
📚 Learning: 2025-09-02T13:42:44.885Z
Learnt from: pcastonguay
Repo: NVIDIA/TensorRT-LLM PR: 7455
File: tensorrt_llm/_torch/pyexecutor/py_executor.py:1852-1860
Timestamp: 2025-09-02T13:42:44.885Z
Learning: In MPI communication within TensorRT-LLM pipeline parallelism, different communication types (tokens, logits, termination sync) must use disjoint tag namespaces to avoid message routing collisions when using the same source/destination patterns.
Applied to files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/llmapi/disagg_utils.pytensorrt_llm/_utils.pytensorrt_llm/_torch/pyexecutor/py_executor.py
📚 Learning: 2025-12-12T03:27:08.565Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 9655
File: tensorrt_llm/_torch/pyexecutor/sampler.py:3031-3031
Timestamp: 2025-12-12T03:27:08.565Z
Learning: In files under tensorrt_llm/_torch/pyexecutor, avoid accessing torch.Tensor objects inside for-loops when iterating over requests. Convert batched tensors to Python lists beforehand using tensor.tolist(), and then iterate over those lists. This improves performance by reducing tensor-bound operations inside hot loops. Apply this pattern to similar code paths that process batches to access simple Python data structures (lists) inside loops.
Applied to files:
tensorrt_llm/_torch/pyexecutor/executor_request_queue.pytensorrt_llm/_torch/pyexecutor/llm_request.pytensorrt_llm/_torch/pyexecutor/py_executor.py
📚 Learning: 2025-08-09T02:04:49.623Z
Learnt from: Fridah-nv
Repo: NVIDIA/TensorRT-LLM PR: 6760
File: tensorrt_llm/_torch/auto_deploy/models/quant_config_reader.py:81-98
Timestamp: 2025-08-09T02:04:49.623Z
Learning: In TensorRT-LLM's auto_deploy module, torch.dtype values in configuration dictionaries must be stored as string representations (e.g., "float16" instead of torch.float16) because OmegaConf.merge does not support torch.dtype types. These string representations are converted to actual torch.dtype objects in downstream code.
Applied to files:
tensorrt_llm/_torch/utils.py
📚 Learning: 2025-08-19T12:45:11.997Z
Learnt from: amitz-nv
Repo: NVIDIA/TensorRT-LLM PR: 7033
File: tensorrt_llm/_torch/pyexecutor/model_engine.py:0-0
Timestamp: 2025-08-19T12:45:11.997Z
Learning: In tensorrt_llm/_torch/pyexecutor/model_engine.py, DoRA (Delta Orthogonal Rank Adaptation) functionality was removed from the PyTorch flow to eliminate issues with inverted DoRA detection logic. The original is_dora condition was checking if scaling_vec_pointer == 0, which was potentially incorrect.
Applied to files:
tensorrt_llm/_torch/pyexecutor/py_executor.py
🧬 Code graph analysis (4)
tensorrt_llm/_torch/pyexecutor/executor_request_queue.py (2)
tensorrt_llm/_utils.py (1)
nvtx_range(911-930)tensorrt_llm/_torch/distributed/communicator.py (1)
tp_cp_broadcast(188-198)
tensorrt_llm/_torch/utils.py (1)
tensorrt_llm/_utils.py (7)
TensorWrapper(995-1062)torch_dtype_to_str(233-234)numel(1041-1042)dtype(1017-1018)dtype(1025-1035)shape(1021-1022)shape(1038-1039)
tensorrt_llm/_torch/pyexecutor/llm_request.py (2)
tensorrt_llm/executor/result.py (1)
context_logits(233-234)tensorrt_llm/_torch/pyexecutor/executor_request_queue.py (1)
set_exclude_last_generation_logits(837-851)
tensorrt_llm/_torch/pyexecutor/py_executor.py (4)
tensorrt_llm/_utils.py (4)
mpi_comm(514-518)nvtx_range(911-930)set_thread_local_mpi_comm(510-511)trace_func(797-838)tensorrt_llm/_torch/expert_statistic.py (2)
ExpertStatistic(10-101)get(14-15)tensorrt_llm/_torch/pyexecutor/resource_manager.py (3)
ResourceManager(1389-1436)ResourceManagerType(50-55)request_context(118-142)tensorrt_llm/_torch/pyexecutor/scheduler.py (3)
SerializableSchedulerOutput(69-120)from_scheduler_result(81-100)to_scheduler_result(102-120)
🪛 Ruff (0.14.11)
tensorrt_llm/_torch/pyexecutor/py_executor.py
1310-1310: zip() without an explicit strict= parameter
Add explicit value for parameter strict=
(B905)
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🔇 Additional comments (4)
tensorrt_llm/llmapi/disagg_utils.py (1)
8-8: LGTM on import addition.The
pkl5import frommpi4py.utilis appropriate for enabling pickle protocol 5 support for large object serialization in MPI communication.tensorrt_llm/_torch/pyexecutor/executor_request_queue.py (1)
603-606: NVTX range around TP/CP broadcast looks good. Adds useful profiling signal without changing semantics.tensorrt_llm/_torch/pyexecutor/py_executor.py (2)
69-74: Nice: explicit PP comm tags reduce collision risk. This aligns with the “disjoint tag namespaces” requirement for PP/MPI traffic. Based on learnings, this is the right direction.
1283-1292: MPI comm duplication per thread makes sense; please verify mpi4py/pkl5 semantics. In particular: confirmDup()/Free()in this thread doesn’t interact badly with process shutdown paths or withENABLE_MULTI_DEVICE=Falseconfigurations.
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Signed-off-by: Yuxian Qiu <142763828+yuxianq@users.noreply.github.com>
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5 participants
Description
In pp executor loop, there are two kinds of data flows between ranks:
We interlace request/response flows in the same executor loop.
Since we always wait sample state after n iteration since we submit its forward step, the last rank will block rank 0's executor loop if the forward steps of different ranks are uneven.
By executing response flows in a background thread, this PR enables a fully non-blocking pp executor loop.
In pp executor loop, we only handle these responses when available in
_handle_executed_batch.To keep the execution state of different ranks in sync, we count the available responses on rank 0 and send the response number to other ranks, so that all ranks handle the same set of responses in the same iteration.
There are two response flows in the previous implementation:
In this PR, we merge these two response flows into a single flow, and send the diff of logits instead to reduce communication overhead.
This PR also contains the following improvements:
TLLM_PP_ASYNC_BROADCAST_SAMPLE_STATEto disable the non-blocking sample state broadcast, which is useful to get a deterministic result in unit tests or as fallback.MIN_ASYNC_MICRO_BATCH_NUM.PP_COMM_TAG_SAMPLE_STATEto avoid tag conflict. So asTERMINATION_COMM_TAG.tensor_to_strfor debugging.Test Coverage
PR Checklist
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PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
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Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
Update tava architecture diagram if there is a significant design change in PR.
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.
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