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clocks(v5): annotate HPM with source (chip|board) and svb_version#170

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widgetii merged 1 commit into
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Jun 2, 2026
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clocks(v5): annotate HPM with source (chip|board) and svb_version#170
widgetii merged 1 commit into
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@widgetii widgetii commented Jun 2, 2026

Follow-up to #168. Two cheap, useful annotations on the existing V5 hpm block — both surfaced from registers we already discovered while bringing up Hi3519DV500.

What

Field Source Meaning
source HPM_STORAGE_REG bit[30] (u_hpm_storage_reg.use_board_hpm) chip = in-die measurement averaged by boot software; board = board-fixture calibration override.
svb_version SVB_VER_REG (SYSCTRL+0x168) bits[5:2] (u_svb_version_reg.svb_type) none / 10 / 20 / 00 / 608 per enum product_type in svb.h.

The source annotation matters when comparing HPM readings across boards — a board value is whatever the manufacturing line decided to ship, not the real silicon process bin.

svb_version is the missing piece for SVB-version-aware binning. svb.h ships three different boundary constants (CORE_HPM_BOUND_10 = 230, CORE_HPM_BOUND_20 = 222, CORE_HPM_BOUND_10_ESMT = 210) and the "right" threshold depends on which SVB the firmware is configured for. When svb_version=none (this board's case), the firmware isn't running SVB at all and the standard tri-state classification is informational only.

Output on Hi3519DV500

clocks:
  hpm:
    bin: high
    source: chip            # NEW
    svb_version: none       # NEW

ipctool clocks (full) appends source and svb_version after the existing reg/raw/value/bin/binning_window/aux_reg/aux_value/aux_name block.

Test plan

  • Reads HPM_STORAGE_REG=0x12d47d2c → bit[30]=0 → source: chip
  • Reads SVB_VER_REG=0x00100200 → svb_type=0 → svb_version: none
  • CI green on all three matrix targets (arm32 / mips32 / arm64)
  • Verify on a board where SVB is actually configured (svb_type ∈ {1,2,3,4}) — none in the lab right now

Not in scope

  • SVB-aware bin thresholding — i.e., picking bin_min from the live SVB version rather than the V4-style window 210..310 baked into v5_hpms[]. Doable but needs validation on multiple SVB-version chips; left for a follow-up.
  • APHY SSC block (CRG+0x1A0 area, much richer bitfield map in the u-boot patch) — separate spread-spectrum module attached to the ethernet APHY, not part of HPM.

🤖 Generated with Claude Code

Two cheap, useful annotations on the existing v5 hpm output:

source       -- HPM_STORAGE_REG bit[30] (u_hpm_storage_reg.use_board_hpm
                in svb.h). When set, HPM_STORAGE_REG bits[9:0] reflect a
                board-fixture calibration override rather than an in-die
                measurement averaged by boot software. The "chip" value
                is the real silicon process bin; the "board" value is
                whatever the manufacturing line decided to ship. Worth
                knowing when comparing HPM readings across boards.

svb_version  -- SVB_VER_REG (SYSCTRL+0x168) bits[5:2]
                (u_svb_version_reg.svb_type / enum product_type):
                1=SVB_10, 2=SVB_20, 3=SVB_00, 4=SVB_608, 0=none. The
                "binning pass" threshold for "this die is fast enough"
                depends on the SVB version (CORE_HPM_BOUND_10 / _20 /
                _10_ESMT in svb.h). On boards where svb_version=none the
                firmware isn't running SVB at all and the standard hpm_info
                tri-state classification is informational only.

Hi3519DV500 demo board reads source=chip, svb_version=none -- which
matches what we observed in the SSMOD/HPM survey (HPM_STORAGE_REG bit[30]
clear; SVB_VER_REG=0x00100200 -> svb_type=0).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
@widgetii widgetii merged commit d18902f into master Jun 2, 2026
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@widgetii widgetii deleted the v5-hpm-source-and-svb-version branch June 2, 2026 15:45
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