Gd32vw553k examples and fixes (i2c, pwm, sdcard, adc).

[JorgeGzm]

Summary

Fixes two GD32VW55x driver bugs and adds four gd32vw553k-start examples on
top of the nsh base.

Driver fixes

• gd32vw55x_i2c.c: the I2C master never completed a transfer. It is clocked
  by the kernel clock in RCU_CFG1.I2C0SEL, not APB1; the driver left it at
  the APB1 default, so the computed TIMING put SDADEL/SCLDEL below the IP
  analog-filter minimum and SCL was never driven. Now routes I2C0 to IRC16M
  and floors the prescaler (matching the vendor BSP). Also honours the
  CONFIG_GD32VW55X_I2C_TIMEOTICKS=0 "derive from time" contract (the
  #ifndef never fired, so the timeout was 0) and hardens the ISR wait.
• gd32vw55x_adc.c: adc_shutdown() gates the ADC clock on close, but
  adc_setup() never re-enabled it (only the one-shot adc_reset() did), so
  a second open() hung. adc_setup() now re-enables the clock.

New configurations

config	what	pins (J1)
sht3x	I2C0 + i2ctool + SHT3x (/dev/i2c0, /dev/temp0)	SCL PA2, SDA PA3 (AF4)
pwm	PWM on TIMER1 (/dev/pwm0)	PA0 (AF1)
sdcard	SD card on SPI0 + FAT, auto-mounted /mnt/sd	SCK PA2, MISO PA1, MOSI PA0, CS PA4
adc	ADC (/dev/adc0) + adc example	PB0 = ADC_IN8

Pin routing is in board.h, device registration in gd32_bringup.c, each
example is a standalone defconfig, and the board index.rst documents all
four.

Commits (4) -- each driver fix is folded into the example that exercises it:

1. fix I2C master and add gd32vw553k-start sht3x example -- fixes the I2C
   clock/timeout bugs and adds the sht3x config.
2. add pwm example to gd32vw553k-start -- adds the pwm config (TIMER1 on
   PA0).
3. add sdcard (SPI/FAT) example to gd32vw553k-start -- adds the sdcard
   config with the SPI chip-select glue and FAT auto-mount.
4. fix ADC reopen and add gd32vw553k-start adc example -- fixes the ADC
   clock re-enable on open and adds the adc config.

Impact

• New feature: four opt-in board configs. Also two driver bug fixes.
• Build/API/compat: no new default built, no Kconfig or public API change,
  backward compatible.
• Hardware (positive): I2C now works and the ADC can be reopened on all boards
  of the arch. Only periph enables these peripherals; nsh, wapi,
  sta_softap, ble, ostest, littlefs are unaffected (every change is
  preprocessed out for them).
• Docs: index.rst gains sht3x, pwm, sdcard, adc sections.

Testing

Verified on real hardware: gd32vw553k-start (GD32VW553KMQ, Nuclei N307),
riscv-none-elf-gcc 14.2.0, flashed over GD-Link/OpenOCD. All four configs
build clean; nxstyle/checkpatch clean on every touched file.

Before the I2C fix (gd32vw553k-start:sht3x): every transfer times out,
the master is stuck with BUSY set and never drives SCL:

nsh> i2c dev 0x03 0x77
gd32_i2c_transfer: ERROR: Timed out: STAT=0x00008001
... (repeats for every address; no device detected)

After the change:

sht3x -- SHT3x on I2C0 (SCL PA2, SDA PA3):

nsh> i2c dev -z 0x03 0x77
40: -- -- -- -- 44 -- -- -- -- -- -- -- -- -- -- --   # SHT3x at 0x44
nsh> sht3x
Temperature = 26.530098
Humidity    = 47.998001

(The default one-byte-read probe is NACKed by the SHT3x when no measurement is
pending, so -z is used to detect it.)

pwm -- scope/LED on PA0:

nsh> pwm
pwm_main: starting output with frequency: 100 channel: 1 duty: 00007fff
pwm_main: stopping output

sdcard -- microSD-over-SPI breakout on SPI0:

nsh> ls /dev/
/dev:
 console
 mmcsd0
 null
 ttyS0
 zero
nsh> mount
  /mnt/sd type vfat
nsh> echo "GD32 on NuttX" > /mnt/sd/hello.txt
nsh> cat /mnt/sd/hello.txt
GD32 on NuttX

The card is auto-mounted on /mnt/sd and writes persist across a reboot. The
breakout must be powered from 5 V (its 3.3 V regulator needs the headroom for
the card's power-up current bursts, otherwise it hangs in the ACMD41 loop).

adc -- ADC_IN8 on PB0, with 1.65 V (half of the 3.3 V full scale) applied:

nsh> adc
adc_main: g_adcstate.count: 20
adc_main: Hardware initialized. Opening the ADC device: /dev/adc0
Sample:
1: channel: 8 value: 2108
Sample:
1: channel: 8 value: 2115
Sample:
1: channel: 8 value: 2112
... (20 groups)

1.65 V lands at mid-scale (~2048); ~2110 is within the tolerance of an
uncalibrated ADC.

[github-actions]

MemBrowse Memory Report

No memory changes detected for:

• arduino-mega2560
• esp32-devkitc
• hifive1-revb
• mirtoo
• qemu-armv8a
• qemu-intel64
• rx65n-rsk2mb
• s698pm-dkit
• stm32-nucleo-f103rb

[cederom]

Thank you @JorgeGzm great work and perfect reporting / documenting :-)

[cederom]

Note: next time please put changes like "arch/arm: Reserve r10 via ARCHCFLAGS and hoist the PIC module flags." into a separate PR as it impacts many ARM devices and is out of scope of GD32 update :-)

[acassis]

@JorgeGzm please analyze the impact of changing other architectures. Ideally a PR for a specific arch shouldn't modify all others like here, could be some AI issue. Double check

[cederom]

Would it be a lot of work to move out ARM R10 changes into a separate PR @JorgeGzm ?

[acassis]

Would it be a lot of work to move out ARM R10 changes into a separate PR @JorgeGzm ?

@cederom it seems like a BUG, it didn't come from his PR, probably it happened during some rebase

[cederom]

Please move out "arch/arm: Reserve r10 via ARCHCFLAGS and hoist the PIC module flags." commit into a separate PR @JorgeGzm :-)

[cederom]

Thank you for the updates @JorgeGzm great job! :-)