Improve conversion of DSLX structs to SystemVerilog

[magancarz]

This pull request proposes an automatic way of converting DSLX structs to SystemVerilog by adding a struct type in IR. Using structs in SystemVerilog can be used to improve debugging experience of the codegen result and discussion about this topic was introduced in #1239.

DSLX structs could already be converted and used in SystemVerilog with the following workflow:

• Use dslx_to_verilog_main to generate SystemVerilog from DSLX types.
• Add sv_type attribute to DSLX types user want to use in SystemVerilog.
• Pass IR interface proto with channel data about which sv_types are used to codegen_main.
• Ensure emit_sv_types flag is set to True in codegen_main.

Automatic generation of structs to SystemVerilog can be tested by building structs_verilog target added with draft changes:

bazel build //xls/examples:structs_verilog

It will generate a bazel-bin/xls/examples/structs.sv file with struct definitions and Sender proc's codegen result with struct types used in channel ports.

I've also added a commit 1178df45 which fixes handling of sv_type attribute with input/output ports in codegen as copying the system verilog type value was omitted in the Block::Clone() function.

TODO:

• Allow generation of SystemVerilog structs to a separate file like dslx_to_verilog_main does.
• Make automatic conversion optional through a flag.
• Add unpacked type as currently structs are packed by default.
• Rethink common handling of tuple and struct types in IR.