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[SYCL][FE] Make llvm.fpbuiltin.sincos to accept anyptr parameter#22517

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intel:syclfrom
jinge90:fpbuiltin_sincos_anyptr
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[SYCL][FE] Make llvm.fpbuiltin.sincos to accept anyptr parameter#22517
jinge90 wants to merge 38 commits into
intel:syclfrom
jinge90:fpbuiltin_sincos_anyptr

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@jinge90

@jinge90 jinge90 commented Jul 2, 2026

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llvm.fpbuiltin.sincos intrinsic accepts llvm_ptr_type parameter which means it only expects pointer parameter with AS0, this will lead to compiler crash in SYCL device compilation. This PR fixes the compiler crash issue by making it to accept llvm_anyptr_type parameter, the newly added sincos_fpbuiltin_device.cpp test will lead to compiler crash without this fix.

Signed-off-by: jinge90 <ge.jin@intel.com>
@jinge90 jinge90 requested review from a team as code owners July 2, 2026 06:00
@jinge90 jinge90 requested review from slawekptak and zahiraam July 2, 2026 06:00
@jinge90

jinge90 commented Jul 3, 2026

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Hi, @zahiraam
Could you take a look at this PR?
Thanks very much.

@zahiraam zahiraam left a comment

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Looks good. Thanks.

@jinge90

jinge90 commented Jul 6, 2026

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Hi, @intel/dpcpp-cfe-reviewers @intel/dpcpp-tools-reviewers @intel/llvm-reviewers-runtime
Could you help review this patch?
Thanks very much.

Comment thread clang/lib/CodeGen/CGBuiltin.cpp
@jinge90 jinge90 requested a review from Fznamznon July 6, 2026 14:10

@YuriPlyakhin YuriPlyakhin left a comment

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the change in llvm/include/llvm/IR/Intrinsics.td LGTM

Question for my education: why do we have this divergence from upstream (I mean the entire Floating Point Builtin Intrinsics block?

@zahiraam

zahiraam commented Jul 6, 2026

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Question for my education: why do we have this divergence from upstream (I mean the entire Floating Point Builtin Intrinsics block?

The entire llvm.fpbuiltin.* intrinsic block is an Intel-specific customization that doesn't exist in upstream LLVM.
These intrinsics were introduced to support the Intel-specific -ffp-accuracy= compiler flag, which allows users to control floating-point accuracy/performance tradeoffs for SYCL device code. The flag has values like high, medium, low, sycl, or cuda to tune math library implementations.

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4 participants