[Doc][SPIR-V] Move FP4 E2M1 to SPV_EXT_ocp_microscaling_types#22528
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uditagarwal97 merged 1 commit intoJul 6, 2026
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Represent the FP4 (E2M1) type with the multi-vendor [SPV_EXT_ocp_microscaling_types](https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_ocp_microscaling_types.html) extension (Float4E2M1EXT encoding) instead of the Intel-only SPV_INTEL_float4, for both plain values and cooperative-matrix component types. Repoint mini_float_conversions_env.asciidoc to the EXT encoding and extension. Narrow SPV_INTEL_float4 to a single role: it no longer defines an encoding or plain-type capability, and only adds Float4E2M1CooperativeMatrixINTEL to enable the Float4E2M1EXT type as a cooperative-matrix component type. AI-assisted: Claude Opus 4.8 (commercial SaaS)
bashbaug
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Jul 6, 2026
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LGTM, the move from the Intel-specific extension to the multi-vendor EXT extension is the right direction.
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@intel/llvm-gatekeepers , please, merge. |
MrSidims
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Jul 9, 2026
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| - Dmitry Sidorov, Intel + | ||
| - Victor Mustya, Intel + | ||
| - Ben Ashbaugh, Intel + | ||
| - Dounia Khaldi, Intel + | ||
| - Joe Garvey, Intel + | ||
| - Greg Lueck, Intel + | ||
| - Pawel Jurek, Intel + | ||
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| - Dmitry Sidorov, Intel + | |
| - Victor Mustya, Intel + | |
| - Ben Ashbaugh, Intel + | |
| - Dounia Khaldi, Intel + | |
| - Joe Garvey, Intel + | |
| - Greg Lueck, Intel + | |
| - Pawel Jurek, Intel + | |
| - Viktoria Maksimova, Intel + |
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Represent the FP4 (E2M1) type with the multi-vendor SPV_EXT_ocp_microscaling_types extension (Float4E2M1EXT encoding) instead of the Intel-only
SPV_INTEL_float4, for both plain values and cooperative-matrix component types.Repoint
mini_float_conversions_env.asciidocto the EXT encoding and extension.Narrow
SPV_INTEL_float4to a single role: it no longer defines an encoding or plain-type capability, and only addsFloat4E2M1CooperativeMatrixINTELto enable theFloat4E2M1EXTtype as a cooperative-matrix component type.AI-assisted: Claude Opus 4.8 (commercial SaaS)