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Add EL2 examples (requires #127 and #119)#131

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thejpster wants to merge 16 commits intorust-embedded:mainfrom
thejpster:fun-with-el2
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Add EL2 examples (requires #127 and #119)#131
thejpster wants to merge 16 commits intorust-embedded:mainfrom
thejpster:fun-with-el2

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@thejpster
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Adds another batch of examples which all run at EL2.

  • HVC calls at EL2 go into the SVC handler
  • Information about Data Aborts, Prefetch Aborts, Undefined Exceptions, etc, appear in the Hyp Syndrome Register, and not where EL1 expects to find them (DFSR, IFAR, etc)
  • You return from an IRQ, HVC, or whatever, with an eret, so a while new batch of assembly trampolines were required
  • A feature was added to aarch32-rt to enable these new EL2 trampolines. This feature also skips putting you into EL1 automatically.

Requires #127 and #119

thejpster and others added 16 commits February 20, 2026 20:50
Will make it easier to add other tests, like sharing the GIC across
cores.
We send a Software Generated Interrupt from Core 0 to Core 1, and then
another one back the other way.
* The `_num_cores` symbol controls how many copies of each stack you get
* Added better docs to link.x
* Added `enum Stack` to aarch32-rt, which can fetch information about
  each stack
* Simplified the SMP start-up code
* Stacks and stack related code are now all in the same order

If you want to put stacks into TCM, you'll need custom routines. This
code assumes stacks all live in the same region of RAM.
Only tested on Armv8-R because Rust's Armv7-A targets don't have
virtualization support enabled.
Also expands ISS decoding for HSR.
@jonathanpallant jonathanpallant marked this pull request as draft March 5, 2026 10:17
@jonathanpallant
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Blocking this until #119 and #127 are in

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2 participants