fix: Blues Swan Initialization#2955
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- improve comment accuracy - macro variable rename
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Pull request overview
This PR targets the Blues SWAN_R5 board initialization to ensure the 3V3 regulator discharge pin is configured correctly (open-drain) at startup, addressing issue #2954. It also includes broader variant maintenance changes for SWAN_R5 pin mappings and clock configuration documentation, plus a small cleanup/fix for the Blues CYGNET variant.
Changes:
- Fix SWAN_R5 3V3 regulator initialization by configuring the DISCHARGE pin as open-drain (OD) rather than push-pull (PP).
- Restructure SWAN_R5 variant pin definitions /
digitalPin[]layout and annotate mappings more explicitly. - Cleanup CYGNET VMAIN divider macro naming and refine clock-config documentation/comments.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
variants/STM32L4xx/.../variant_SWAN_R5.h |
Reworks SWAN_R5 pin defines and adds board/regulator/VMAIN helper macros. |
variants/STM32L4xx/.../variant_SWAN_R5.cpp |
Updates digitalPin[] / analogInputPin[]; fixes regulator init (PE6 open-drain); expands clock-config commentary. |
variants/STM32L4xx/.../PeripheralPins_SWAN_R5.c |
Converts to a “manually generated” pin map with schematic reference and many comment clarifications/adjustments. |
variants/STM32L4xx/.../variant_CYGNET.h |
Renames/fixes VMAIN divider constant usage (VMAIN_ADC_DIV_K). |
variants/STM32L4xx/.../variant_CYGNET.cpp |
Documentation/reference cleanup in clock config; minor struct field/comment adjustments. |
variants/STM32L4xx/.../PeripheralPins_CYGNET.c |
Adds schematic link comment. |
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variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp
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variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c
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variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp
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Addresses #2954
Also: Minor clean-up of Blues Cygnet