fix(vt-d): invalidate cache when initializing and updating

[ytakano]

Description

VT-d Interrupt Remapping Implementation and Enhancements.
Invalidate the cache of interrupt remapping when initializing and updating.

Cache Invalidation

• Implemented global interrupt entry cache invalidation with ESIRTPS (Enhanced Set Interrupt Root Table Pointer Support) detection
• Automatic invalidation for hardware without ESIRTPS support

• Invalidate cache when updating interrupt remappings

IOMMU State Management

• Added IommuInfo and VtdUnit structures.
• Added IOMMU global variable to track both VT-d units and interrupt remapping tables

Related links

https://www.google.com/url?sa=t&source=web&rct=j&opi=89978449&url=https://cdrdv2-public.intel.com/671081/vt-directed-io-spec.pdf&ved=2ahUKEwjJ1oCiufaRAxWPnq8BHVbbLy8QFnoECAwQAQ&usg=AOvVaw3fO9wnba58SqsP2HNKwdfu

How was this PR tested?

Tested on a physical x86_64 machine.

[          538 INFO] Vt-d Queued Invalidation enabled: Segment = 0, Queue PhyAddr = 0x44a6000, IQA = 0x44a6000, IQH = 0
, IQT = 0
[          571 INFO] Vt-d Interrupt Remapping: Segment = 0, Vt-d Base = 0xfed90000, Table PhyAddr = 0x43a5000, enabled
= true, mode = x2APIC, extended capability = 0x29a00f0505e, global status = 0x47000000, IRTA = 0x43a580f, DHRD.flags =
0x0
Vt-d Device Scope: entry type = 1, length = 8, flags = 0x0, enumeration ID = 0, start bus number = 0, path = [2, 0]
[          665 INFO] Vt-d Queued Invalidation enabled: Segment = 0, Queue PhyAddr = 0x44a8000, IQA = 0x44a8000, IQH = 0
, IQT = 0
[          698 INFO] Vt-d Interrupt Remapping: Segment = 0, Vt-d Base = 0xfed91000, Table PhyAddr = 0x43a5000, enabled
= true, mode = x2APIC, extended capability = 0xf050da, global status = 0x47000000, IRTA = 0x43a580f, DHRD.flags = 0x1
Vt-d Device Scope: entry type = 3, length = 8, flags = 0x0, enumeration ID = 2, start bus number = 0, path = [1e, 7]
Vt-d Device Scope: entry type = 4, length = 8, flags = 0x0, enumeration ID = 0, start bus number = 0, path = [1e, 6]
[          825 INFO] VT-d segment 0: ESIRTPS not supported (ECAP=0x29a00f0505e), performing global invalidation
[          854 INFO] Vt-d: Invalidated all interrupt entries: segment = 0, vtd_base = 0x100fed90000, iq_base = 0x400001
02000, IQH = 0x20, IQT = 0x20
[          893 INFO] VT-d segment 0: ESIRTPS not supported (ECAP=0xf050da), performing global invalidation
[          921 INFO] Vt-d: Invalidated all interrupt entries: segment = 0, vtd_base = 0x100fed91000, iq_base = 0x400001
04000, IQH = 0x20, IQT = 0x20
[          960 INFO] Vt-d IOMMU Info:
VT-d Segment 0:
  VT-d Unit [0]: VT-d Base = 0x100fed90000, IQ Base = 0x40000102000, Index = 0
  VT-d Unit [1]: VT-d Base = 0x100fed91000, IQ Base = 0x40000104000, Index = 1
  Interrupt Remapping Table: Base = 0x40000001000, is_x2apic = true

Notes for reviewers