Fix unreachable constant-mask load_masked kernels (sse2, neon)#1376
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Fix unreachable constant-mask load_masked kernels (sse2, neon)#1376DiamonDinoia wants to merge 1 commit into
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The sse2 and neon constant-mask load_masked kernels were unreachable: they lacked the convert<T> overload parameter the dispatcher passes, so calls fell through to the runtime-mask path. Add the parameter and fix the mask conditions, which used ambiguous count-based tests (e.g. countr_one()==2 also matches 0b1011, silently dropping a lane). Add batch_bool_constant::is_prefix/is_suffix shape predicates plus prefix()/ suffix() returning the set-run length (or size+1 when the mask is not that shape, keeping == exact). The sse2 kernels now dispatch on these instead of raw bit patterns, so each condition reads as the lane shape it handles. avx_128 delegates prefix/upper-half masks to sse2: those lower to plain moves (vmovss/movlps/…) which store-forward, whereas vmaskmov never does on Intel and its stores are microcoded on AMD. Tests cover the shape predicates including off-by-one boundaries (size-1 vs the size+1 sentinel) and near-full mask patterns through the load/store kernels.
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The public dispatch in xsimd_batch.hpp calls
kernel::load_masked(mem, mask, convert{}, mode, A{}), but the sse2 (integral/float/double) and neon constant-mask overloads were declared without the convert parameter, so overload resolution always fell through to the generic common kernel, which round-trips partial loads through a zeroed stack buffer.