Lemp14

.gitmodules

@@ -70,3 +70,7 @@
 [submodule "3rdparty/open-power-signing-utils"]
 	path = 3rdparty/open-power-signing-utils
 	url = https://review.coreboot.org/open-power-signing-utils.git
+[submodule "src/vendorcode/amd/opensil/turin_poc/opensil"]
+	path = src/vendorcode/amd/opensil/turin_poc/opensil
+	url = https://github.com/openSIL/openSIL.git
+	branch = turin_poc

Documentation/POSTCODES

@@ -5,7 +5,7 @@ coreboot POST Codes
 This is an (incomplete) list of POST codes emitted by coreboot v4.
 
 0x10 Entry into protected mode
-0x01 Entry into 'crt0.s' reset code jumps to here
+0x01 Entry into 'entry16.S' reset code jumps to here
 0x11 Start copying coreboot to RAM with decompression if compressed
 0x12 Copy/decompression finished jumping to RAM
 0x80 Entry into coreboot in RAM

Documentation/acronyms.md

@@ -204,7 +204,6 @@ Spec](https://uefi.org/specifications) for details, or run the tool
 * CRLF - Carriage Return, Line Feed - \\r\\n - The standard window EOL
   (End-of-Line) marker.
 * crt0 - [**C Run Time 0**](https://en.wikipedia.org/wiki/Crt0)
-* crt0s - crt0 Source code
 * CRT - [**Cathode Ray Tube**](https://en.wikipedia.org/wiki/Cathode-ray_tube)
 * CSE - Intel: Converged Security Engine
 * CSI - MIPI: [**Camera Serial

Documentation/getting_started/architecture.md

@@ -41,7 +41,7 @@ The bootblock loads the romstage or the verstage if verified boot is enabled.
 
 ### Cache-As-Ram
 The *Cache-As-Ram*, also called Non-Eviction mode, or *CAR* allows to use the
-CPU cache like regular SRAM. This is particullary useful for high level
+CPU cache like regular SRAM. This is particularly useful for high level
 languages like `C`, which need RAM for heap and stack.
 
 The CAR needs to be activated using vendor specific CPU instructions.

Documentation/mainboard/index.md

@@ -358,8 +358,10 @@ StarBook Mk V <starlabs/starbook_tgl.md>
 StarBook Mk VI <starlabs/starbook_adl.md>
 StarBook Mk VII (N200) <starlabs/starbook_adl_n.md>
 StarBook Mk VII (165H) <starlabs/starbook_mtl.md>
-Byte Mk II <starlabs/byte_adl.md>
+StarBook Horizon <starlabs/adl_horizon.md>
+Byte Mk II <starlabs/byte.md>
 StarFighter Mk I <starlabs/starfighter_rpl.md>
+StarFighter Mk II <starlabs/starfighter_mtl.md>
 
 Building coreboot <starlabs/common/building.md>
 Flashing devices <starlabs/common/flashing.md>

Documentation/mainboard/lenovo/skylake.md

@@ -193,8 +193,6 @@ binaries if only flashing the `bios` region.
 
 ## Known Issues
 
-- Alpine Ridge Thunderbolt 3 controller does not work
-  - Lower (right) USB-C port only works for charging/DP alt mode, not USB/PCIe data
 - Some Fn+F{1-12} keys aren't handled correctly
 - Nvidia dGPU is finicky
   - Needs option ROM
@@ -206,6 +204,7 @@ binaries if only flashing the `bios` region.
 
 ## Verified Working
 
+- Alpine Ridge Thunderbolt 3 controller
 - Integrated graphics init with libgfxinit
 - video output: internal (eDP), miniDP
 - ACPI support

Documentation/mainboard/protectli/fw6.md

@@ -57,8 +57,13 @@ This chip is located on the bottom side of the case (the radiator side). One
 has to remove all screws (in order): 4 top cover screws, 4 side cover screws
 (one side is enough), 4 mainboard screws, 4 CPU screws (under DIMMs). Lift up
 the mainboard and turn around it. The flash chip is near the SoC on the DIMM
-slots side. Use a clip (or solder the wires) to program the chip. Specifically,
-it's a Macronix MX25L6406E (3.3V) -[datasheet][MX25L6406E].
+slots side. Desolder and reprogram the chip, or use a clip (or solder the
+wires) to program the chip. Specifically, it's a Macronix MX25L6406E (3.3V)
+-[datasheet][MX25L6406E], while on some other boards it's a Macronix MX25L6436F.
+
+At least on some revisions of the motherboard, it's not possible to reprogram
+the chip with a clip, while the board is powered off, because there's no diode
+to prevent backfeeding power to other components on the board.
 
 ## Known issues
 
@@ -99,8 +104,26 @@ the cables or not being populated on the board case.
 
 ## Technology
 
-There are 3 variants of FW6 boards: FW6A, FW6B and FW6C. They differ only in
-used SoC.
+There are 5 variants of FW6 boards: FW6A, FW6B, FW6C, FW6D and FW6E. They differ
+in used SoC.
+
+There are two revisions of the motherboard, hereby called Old Revision
+(using IT8772E Super I/O chip), and New Revision (using IT8613E Super I/O chip).
+Besides the different Super I/O chip, they also differ in component placement,
+and available internal motherboard headers. The Old Revision motherboards are
+marked with silkscreen "YL-SK1L6-V1", while the New Revision motherboards are
+marked with silkscreen "KBR6LAV20".
+
+WARNING: The current code base only supports the Old Revision motherboards.
+
+To compare the two motherboard
+revisions one may compare the [New Revision FW6A Datasheet] to the
+[Old Revision FW6 Series Hardware Overview].
+
+The FW6A/FW6B/FW6C variants are known to have been produced with both
+motherboard revisions.
+
+The FW6D/FW6E variants are only known to exist with the new motherboard revision.
 
 - FW6A:
 
@@ -110,10 +133,12 @@ used SoC.
 +------------------+--------------------------------------------------+
 | PCH              | Kaby Lake U w/ iHDCP2.2 Base                     |
 +------------------+--------------------------------------------------+
-| Super I/O, EC    | ITE IT8772E                                      |
+| Super I/O, EC    | Old revision: ITE IT8772E, New rev.: ITE IT8613E |
 +------------------+--------------------------------------------------+
 | Coprocessor      | Intel Management Engine                          |
 +------------------+--------------------------------------------------+
+| Support          | Currently only the Old Revision is supported     |
++------------------+--------------------------------------------------+
 ```
 
 - FW6B:
@@ -124,10 +149,12 @@ used SoC.
 +------------------+--------------------------------------------------+
 | PCH              | Kaby Lake U w/ iHDCP2.2 Premium                  |
 +------------------+--------------------------------------------------+
-| Super I/O, EC    | ITE IT8772E                                      |
+| Super I/O, EC    | Old revision: ITE IT8772E, New rev.: ITE IT8613E |
 +------------------+--------------------------------------------------+
 | Coprocessor      | Intel Management Engine                          |
 +------------------+--------------------------------------------------+
+| Support          | Currently only the Old Revision is supported     |
++------------------+--------------------------------------------------+
 ```
 
 - FW6C:
@@ -138,21 +165,58 @@ used SoC.
 +------------------+--------------------------------------------------+
 | PCH              | Kaby Lake U w/ iHDCP2.2 Premium                  |
 +------------------+--------------------------------------------------+
-| Super I/O, EC    | ITE IT8772E                                      |
+| Super I/O, EC    | Old revision: ITE IT8772E, New rev.: ITE IT8613E |
 +------------------+--------------------------------------------------+
 | Coprocessor      | Intel Management Engine                          |
 +------------------+--------------------------------------------------+
+| Support          | Currently only the Old Revision is supported     |
++------------------+--------------------------------------------------+
+```
+
+- FW6D:
+
+```{eval-rst}
++------------------+--------------------------------------------------+
+| CPU              | Intel Core i5-8250U                              |
++------------------+--------------------------------------------------+
+| PCH              | Kaby Lake U w/ iHDCP2.2 Premium                  |
++------------------+--------------------------------------------------+
+| Super I/O, EC    | ITE IT8613E                                      |
++------------------+--------------------------------------------------+
+| Coprocessor      | Intel Management Engine                          |
++------------------+--------------------------------------------------+
+| Support          | Currently not supported                          |
++------------------+--------------------------------------------------+
+```
+
+- FW6E:
+
+```{eval-rst}
++------------------+--------------------------------------------------+
+| CPU              | Intel Core i7-8550U                              |
++------------------+--------------------------------------------------+
+| PCH              | Kaby Lake U w/ iHDCP2.2 Premium                  |
++------------------+--------------------------------------------------+
+| Super I/O, EC    | ITE IT8613E                                      |
++------------------+--------------------------------------------------+
+| Coprocessor      | Intel Management Engine                          |
++------------------+--------------------------------------------------+
+| Support          | Currently not supported                          |
++------------------+--------------------------------------------------+
 ```
 
 ## Other compatible boards
 
 As Protectli licenses and uses [Yanling] appliances with no modifications
 to the actual hardware, any compatible [Yanling] appliances would work.
-Specifically, look for hardware with the same CPU and NIC and coreboot
-should be able to compile and boot with no modifications required.
+Specifically, look for hardware with the same CPU, NIC, and Super I/O chip
+and coreboot should be able to compile and boot with no modifications
+required.
 
 [Protectli FW6]: https://protectli.com/vault-6-port/
 [website]: https://protectli.com/kb/coreboot-on-the-vault/
 [MX25L6406E]: https://www.macronix.com/Lists/Datasheet/Attachments/7370/MX25L6406E,%203V,%2064Mb,%20v1.9.pdf
 [flashrom]: https://flashrom.org/
 [Yanling]: http://www.ylgkdn.cn/
+[New Revision FW6A Datasheet]: https://kb.protectli.com/wp-content/uploads/sites/9/2025/04/FW6A-Datasheet-20250204.pdf
+[Old Revision FW6 Series Hardware Overview]: https://kb.protectli.com/kb/fw6-hardware-overview/

Documentation/mainboard/starlabs/adl_horizon.md

@@ -0,0 +1,86 @@
+# StarBook Mk V
+
+## Specs
+
+- CPU (full processor specs available at <https://ark.intel.com>)
+    - Intel N305 (Alder Lake)
+- EC
+    - ITE IT5570E
+    - Backlit keyboard, with standard PS/2 keycodes and SCI hotkeys
+    - Battery
+    - USB-C PD Charger
+    - Suspend / resume
+- GPU
+    - Intel® Iris® Xe Graphics
+    - GOP driver is recommended, VBT is provided
+    - eDP 13.4-inch 2520x1680 LCD
+    - HDMI video
+    - USB-C DisplayPort video
+- Memory
+    - 32GB LPDD% on-board memory
+- Networking
+    - AX210 2230 WiFi / Bluetooth
+- Sound
+    - Realtek ALC269-VB6
+    - Internal speakers
+    - Internal microphone
+    - Combined headphone / microphone 3.5-mm jack
+    - HDMI audio
+    - USB-C DisplayPort audio
+- Storage
+    - M.2 PCIe SSD
+- USB
+    - 1920x1080 CCD camera
+    - USB 3.1 Gen 2 (left)
+    - USB 3.1 Gen 2 (right)
+    - USB 3.1 Gen 2 Type-A (right)
+
+## Building coreboot
+
+Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_adl_horizon` as config file.
+
+### Preliminaries
+
+Prior to building coreboot the following files are required:
+* Intel Flash Descriptor file (descriptor.bin)
+* Intel Management Engine firmware (me.bin)
+* ITE Embedded Controller firmware (ec.bin)
+
+The files listed below are optional:
+- Splash screen image in Windows 3.1 BMP format (Logo.bmp)
+
+These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
+
+### Build
+
+The following commands will build a working image:
+
+```bash
+make distclean
+make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_adl_horizon_n
+make
+```
+
+## Flashing coreboot
+
+```{eval-rst}
++---------------------+------------+
+| Type                | Value      |
++=====================+============+
+| Socketed flash      | no         |
++---------------------+------------+
+| Vendor              | Winbond    |
++---------------------+------------+
+| Model               | W25Q256.V  |
++---------------------+------------+
+| Size                | 32 MiB     |
++---------------------+------------+
+| Package             | WSON-8     |
++---------------------+------------+
+| Internal flashing   | yes        |
++---------------------+------------+
+| External flashing   | yes        |
++---------------------+------------+
+```
+
+Please see [here](common/flashing.md) for instructions on how to flash with fwupd.

Documentation/mainboard/starlabs/byte_adl.md → Documentation/mainboard/starlabs/byte.md

@@ -34,7 +34,7 @@
 
 ## Building coreboot
 
-Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_byte_adl` as config file.
+Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_byte_adl` (Byte Mk II) or `config.starlabs_byte_twl` (Byte Mk III) as config file.
 
 ### Preliminaries
 
@@ -46,6 +46,10 @@ Prior to building coreboot the following files are required:
 The files listed below are optional:
 - Splash screen image in Windows 3.1 BMP format (Logo.bmp)
 
+coreboot expects these binaries under
+`3rdparty/blobs/mainboard/starlabs/adl/<variant>/`, where `<variant>`
+matches `CONFIG_VARIANT_DIR` (default: `y2`).
+
 These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
 
 ### Build
@@ -55,6 +59,8 @@ The following commands will build a working image:
 ```bash
 make distclean
 make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_adl
+# or
+make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_twl
 make
 ```
 

Documentation/mainboard/starlabs/lite_adl.md

@@ -1,4 +1,4 @@
-# StarBook Mk V
+# StarLite Mk V
 
 ## Specs
 
@@ -33,7 +33,8 @@
 
 ## Building coreboot
 
-Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_starbook_adl` as config file.
+Please follow the [Star Labs build instructions](common/building.md) to build
+coreboot, using `config.starlabs_lite_adl` as config file.
 
 ### Preliminaries
 
@@ -45,6 +46,10 @@ Prior to building coreboot the following files are required:
 The files listed below are optional:
 - Splash screen image in Windows 3.1 BMP format (Logo.bmp)
 
+coreboot expects these binaries under
+`3rdparty/blobs/mainboard/starlabs/adl/<variant>/`, where `<variant>`
+matches `CONFIG_VARIANT_DIR` (default: `i5`).
+
 These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
 
 ### Build
@@ -53,7 +58,7 @@ The following commands will build a working image:
 
 ```bash
 make distclean
-make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_adl
+make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_lite_adl
 make
 ```